←The map Research bank

Theses

Transformer lead times gate hyperscaler returns, not start dates Package Perimeter Arbitrage: Optics Suppliers Capture Value NVIDIA Cannot Retain NAND Flash: Datacenter Crowding-Out Masked by Low Consumer Pull CoWoS Binds the Buyer, Not the Landlord Long-context inference: memory constraint compresses cloud margin before GPU-poor plays feel it Co-packaged optics transfers margin to substrate integrators, not optics specialists Silicon Wafer: Duopoly Capturing Nothing as Downstream Rents Compound Advanced Packaging: The Scarcity Premium Flows Upstream, Not Down Amazon: The Capex-Margin Inversion Microsoft: The High-Multiple Cloud Business Is Already Subscale Foxconn: Margin Squeeze Masked by AI Server Revenue Mix SK Hynix: The Packaging Bottleneck Inverts the Margin Narrative GPU collateral decay gates buildout faster than physical supply Oracle: Monopsony Rent Capture Masked by Consolidated Accounting Innolight: Negative Operating Leverage Hiding in Hyperscaler Concentration Interconnection queue converts hyperscaler capex into generator rent Eaton: Margin expansion telegraphs demand scarcity more than growth can show Electrical Steel Asymmetry: GE Vernova Captures Transformer Scarcity Without Steel Exposure Constellation: Hyperscaler Monopsony Masks Nuclear Fuel Transmission ABF substrate dual-gate arbitrage: substrate converters capture the spread the market assigns upstream Rack Power Density: The Liquid Cooling Adoption Mirage Arm: The Royalty Stream That Scales With Everyone's Margin but Its Own HBM5: The Signal Integrity Bottleneck Transfers Margin to Silicon PHY Designers Shin-Etsu: Margin Expansion Masked by Commodity PVC Consolidation SMIC: Subsidy Converts to Capacity Under Obscured Margin Pressure Semicap service is an installed-base annuity, and the market still prices these names as capex cyclicals Alphabet: The Capex Ratchet Liquidity Mispriced as Platform Optionality Palantir: The Margin-Protected Infrastructure Play Accelink: The Valuation Anomaly in China's Optical Chip Indigenization Transceiver margin expansion is a mirage: buyer concentration at 1.6T resets pricing power the market prices as durable Qualcomm's low capex masks an IP-only future neither consensus nor bears have priced Murata: The Margin That Doesn't Move Applied Optoelectronics: Hyperscaler Procurement Arbitrage Driving Negative Spreads GlobalFoundries: Customer Concentration Masks Structural Insulation from AI Capex Whiplash Silicon capacitors expose Intel's package productivity deficit Arista: Hyperscaler capex intensity conceals margin compression risk Silicon cannot emit light — indium phosphide is the chokepoint CPO relocates but cannot remove MoE inference: converted miners capture memory scarcity, hyperscalers leak it Tesla: AI Pivot Insulated from Datacenter Bottlenecks Custom Silicon Pays a Different Merchant The ABF Chokepoint Does Not Pay Its Owners — Buy the Bottleneck Fails Here NVIDIA's Rent Compresses Through Software, Not Silicon The China chokepoint moves from lithography to bonding — and the substitution trade is priced in the wrong category The Upstream Is Single-Sourced and Unpriced Optical attach is set by topology, not by shipments — linear optical TAM models are mis-specified HBM moat vs. DRAM commoditization — is SK Hynix's HBM-mix 'miss' actually bullish?Power Caps the AI Buildout — the bottleneck moved from chips to megawatts EMIB Shifts the Packaging Bottleneck to Substrates ASML / China-DUV displacement is overpriced — the sell-off prices near-full substitution off a 5-machine data point Cost Per Token Is Set Outside the Chip Chipflation Is a Wafer Allocation, Not a Demand Shock The Neocloud Rent Is Consumed By The Asset Before It Reaches Equity Memory-demand durability — does algorithmic efficiency cap the memory super-cycle?HBM4 Qualification Concentrates Share, Not Spreads It Neocloud margin re-rating — do open-source deployment + rising rental rates break the thin-margin cap?The Megawatt Is the Unit of Account

Mechanisms

ABF substrate and build-up film supply CoWoS advanced-packaging capacity Conventional DRAM and NAND supply (HBM crowding-out)GPU residual value as loan collateral Grid interconnection queue position Heavy-duty gas turbine delivery slots Large power transformer lead times Buyer concentration tightening HBF consortium Rent converting into capacity Rent migrating upstream Rent not being competed away co-packaged-optics displaces copper co-packaged-optics displaces optical-transceiver emib displaces cowos glass-substrate displaces abf-substrate hybrid-bonding displaces euv silicon-capacitor displaces mlcc Chip design Datacenter math Efficiency arrives in steps, not trends Inference shape Memory economics Photonics Tau scaling Token math Tokenomics Capacity arriving — CoWoS (Chip-on-Wafer-on-Substrate)Capacity arriving — HBM4 Capacity arriving — Silicon Wafer

Capacity arriving — HBM4

schedule a named mechanism, not a conclusion

2 announced additions totalling 130 kwpm HBM DRAM wafer starts against a base of 395. Confidence-weighted, that is a 25% expansion. Arriving capacity relieves the scarcity the owner earns on.

The path

node	effect
HBM4	-0.25
Advantest Corporation	+0.15
Camtek Ltd.	+0.15
Google TPU (Alphabet)	+0.15
Lam Research Corporation	+0.15
Micron Technology	+0.25
Onto Innovation Inc.	+0.15
Powertech Technology Inc.	+0.15
Samsung Electronics	+0.25

coverage

Dated 2026-Q4. By confidence: 1 firm, 1 planned. Confidence weights the magnitude rather than filtering — a speculative addition is the part of the pipeline most likely to slip, and hiding it would make the schedule look firmer than it is.

Arguments about this mechanism

None yet. No thesis names this mechanism’s subject, which is a gap in the bank rather than a fact about the mechanism.