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HBM5: The Signal Integrity Tax Inverts the Memory Supplier Power Balance

gen-hbm5 · conviction — · status open · horizon — · as of 2026-08-07

HBM5's signal integrity constraint at 30+ Gb/s creates a moat inversion: SK Hynix's methodology lead in RC-dominated line evaluation becomes a competitive advantage that Samsung and Micron cannot close through capital deployment alone. The 0.42 SI margin indicates proximity to physical limits where process knowledge compounds rather than diffuses.
Robust to undisclosed shares. 2 derived inputs under this thesis; redrawing every supply weight the industry does not publish moves none of them by more than 25%. Computed from evidence at most 17 days old (oldest input: micron).

Exhibits

Exhibit 1Relative performance, indexed to 100How the names in this thesis have traded against SOXX.
86185285SOXX 22512mo, indexed to 100 at start · dashed = SOXX benchmark

Series available as data/gen-hbm5.csv

Exhibit 2What the conviction is actually made ofEach premise and the number it composes to. A conjunction of plausible premises is far weaker than any of them.
SK Hynix has established a durable lead in HBM5 signal integrity methodology that cannot be closed through capital expenditureSK Hynix †100.0%HBM5 — si margin at least 0.4167 †100.0%HBM578.0%SK Hynix — operating margin 58.6% †100.0%COMPOSED (and)78.0%

† 3 premises marked supporting — shown and arguable, but the conclusion does not depend on them, so they are not multiplied into the composed figure. Citing a filed figure should not cost conviction.

One gating premise, so the conclusion is exactly as strong as it. The figure is an ordering device, not a calibrated probability — see how the numbers are made.

Weakest link: HBM5 at 0.78 — Assumes RC-dominated methodology remains non-standard through 2027; JEDEC may standardize sooner

Nvidia and AMD face structural supplier concentration that persists independent of HBM5 capacity additionsNVIDIA Corporation †100.0%Advanced Micro Devices †100.0%HBM571.0%HBM5 — constraint load at least 1 †100.0%COMPOSED (and)71.0%

† 3 premises marked supporting — shown and arguable, but the conclusion does not depend on them, so they are not multiplied into the composed figure. Citing a filed figure should not cost conviction.

One gating premise, so the conclusion is exactly as strong as it. The figure is an ordering device, not a calibrated probability — see how the numbers are made.

Weakest link: HBM5 at 0.71 — Assumes termination remains impractical through HBM5 lifecycle; power budget innovations could restore symmetry

Micron's 346% revenue growth overstates its positioning in the coming margin structure of HBM5Micron Technology †100.0%Micron Technology — revenue growth $346 †100.0%HBM567.0%HBM5 — si margin at least 0.4167 †100.0%COMPOSED (and)67.0%

† 3 premises marked supporting — shown and arguable, but the conclusion does not depend on them, so they are not multiplied into the composed figure. Citing a filed figure should not cost conviction.

One gating premise, so the conclusion is exactly as strong as it. The figure is an ordering device, not a calibrated probability — see how the numbers are made.

Weakest link: HBM5 at 0.67 — Assumes Micron lags in RC line evaluation; they may leapfrog via UCIe-for-HBM if that approach ships

The variant

Consensus

Memory suppliers capture HBM5 economics through structural shortage and packaging constraints. SK Hynix's 198% revenue growth and 59% operating margin reflect pricing power from scarcity. The investment case focuses on capacity expansion and qualification timelines at the three capable suppliers.

Variant

HBM5's signal integrity constraint at 30+ Gb/s creates a moat inversion: SK Hynix's methodology lead in RC-dominated line evaluation becomes a competitive advantage that Samsung and Micron cannot close through capital deployment alone. The 0.42 SI margin indicates proximity to physical limits where process knowledge compounds rather than diffuses. Nvidia and AMD face supplier concentration risk that persists regardless of capacity additions, because the physics problem is asymmetrically solved.

Differentiator

Supply-focused models see three suppliers and assume competition restores balance post-ramp. The transmission-line regime makes HBM5 a know-how moat, not a capex race. SK Hynix is building JEDEC around proprietary evaluation criteria for non-terminated massively parallel interfaces—a standards-capture dynamic the street reads as commodity risk.

Falsifiers

Open questions

Reasoning chain

SK Hynix has established a durable lead in HBM5 signal integrity methodology that cannot be closed through capital expenditure VALID
premises

A 42% SI margin at interposer distances means small evaluation errors cause failures. Proprietary line-modeling translates to yield advantage that compounds with each generation.

Nvidia and AMD face structural supplier concentration that persists independent of HBM5 capacity additions VALID
premises

Unlike prior HBM transitions where capex relieved constraints, the physics gate cannot be solved with wafer starts. Supplier diversity requires know-how transfer that SK Hynix controls.

Micron's 346% revenue growth overstates its positioning in the coming margin structure of HBM5 VALID
premises

Micron's growth reflects HBM4 and commodity recovery. At 42% SI margin the methodology gap becomes a yield and cost gap that volume production magnifies rather than amortizes.

Write-up

Pre-filled skeleton: gen-hbm5.md